||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 1 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits features z precision supply-voltage monitor - 4.63v (pt7a7511, 7521, 7531) - 4.38v (pt7a7512, 7522, 7532) - 3.08v (pt7a7513, 7523, 7533) - 2.93v (pt7a7514, 7524, 7534) - 2.63v (pt7a7515, 7525, 7535) z 200ms reset pulse width z debounced ttl/cmos-compatible manual- reset input z independent watchdog timer 1.6sec time-out (not available for pt7a7531 - 7535) z reset output signal: - active-low only (pt7a7511 - 7515) - active-high only (pt7a7521 - 7525) - active-high and active-low (pt7a7531 - 7535) z voltage monitor for power-fail or low battery warning z guaranteed reset/reset valid at v cc =1.2v description the pt7a751x/752x/753x family microprocessor ( p) supervisory circuits are targeted to improve reliability and accuracy of power-supply circuitry in p?s systems. these devices reduce the complexity and number of components required to monitor power- supply and battery functions. the main functions are: 1. asserting reset output dur ing power-up, power- down and brownout conditions for p system. 2. detecting power failure or low-battery conditions with a 1.25v threshold detector. 3. watchdog functions (not for pt7a753x) applications z power-supply circuitry in p systems ordering information part number package part number package pt7a751xpe lead free dip-8 pt7a751xwe lead free and green soic-8 pt7a752xpe lead free dip-8 pt7a752xwe lead free and green soic-8 pt7a753xpe lead free dip-8 pt7a753xwe lead free and green soic-8 note: ?x? refers to voltage range, see below table. suffix: x?monitored voltage and function comparison part no. reset threshold reset active low or high nom. reset time (ms), t rs nom. watch dog time (sec), t wd power fail comp. manual reset input pt7a7511 4.63v low 200 1.6 1.25v detector yes pt7a7521 4.63v high 200 1.6 1.25v detector yes pt7a7531 4.63v low, high 200 unavailable 1.25v detector yes pt7a7512 4.38v low 200 1.6 1.25v detector yes pt7a7522 4.38v high 200 1.6 1.25v detector yes pt7a7532 4.38v low, high 200 unavailable 1.25v detector yes pt7a7513 3.08v low 200 1.6 1.25v detector yes pt7a7523 3.08v high 200 1.6 1.25v detector yes pt7a7533 3.08v low, high 200 unavailable 1.25v detector yes pt7a7514 2.93v low 200 1.6 1.25v detector yes pt7a7524 2.93v high 200 1.6 1.25v detector yes pt7a7534 2.93v low, high 200 unavailable 1.25v detector yes pt7a7515 2.63v low 200 1.6 1.25v detector yes pt7a7525 2.63v high 200 1.6 1.25v detector yes pt7a7535 2.63v low, high 200 unavailable 1.25v detector yes
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 2 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits block diagram block diagram of pt7a7511-7515/7521-7525 v cc 250ua v rst 1.25v watchdog transition detector watchdog timer wdi wdo timebase for reset & watchdog reset generator mr vcc pfi reset (reset) pfo block diagram of pt7a7531-35 reset generator mr vcc pfi pfo reset 1.25v v rst vcc 250ua reset
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 3 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits pin configuration top view 1 2 3 4 8 7 6 5 mr v cc gnd pfi wdo reset wdi pfo pt7a7511p-7515p pt7a7511w-7515w 8-pin pdip/8-pin soic 1 2 3 4 8 7 6 5 mr v cc gnd pfi wdo reset wdi pfo pt7a7521p-7525p pt7a7521w-7525w 8-pin pdip/8-pin soic 1 2 3 4 8 7 6 5 mr v cc gnd pfi reset reset nc pfo pt7a7531p-7535p pt7a7531w-7535w 8-pin pdip/8-pin soic pin description pin type description mr i manual-reset: triggers a reset pulse when pulled below 0.8v , active low. it has an internal 250ma pull- up current and be driven from a ttl or cmos logic line as well as shorted to ground with a switch. v cc power supply voltage. gnd ground ground reference for all signals. pfi i power-fail voltage monitor input. when pfi is less than 1.25v, pfo goes low. connect pfi to gnd or vcc when not used. pfo o power-fail output: it gets low and sinks current when pfi is less than 1.25v; otherwise pfo stays high. wdi i watchdog input: if wdi remains high or low for 1.6sec, the internal watchdog timer runs out and wdo goes low. floating wdi or connecting wdi to a high-impedance three-state buffer disables the watchdog feature. the internal watchdog timer clears whenever reset is asserted. wd i is three-stated, or wdi sees a rising or falling edge. reset o reset output pulses: low for 200ms when triggered, and stays low whenever vcc is below the reset threshold. it remains low for 200ms after vcc rises above the reset threshold or mr goes from low to high. a watchdog timeout will not trigger reset unless wdo is connected to mr. wdo o watchdog output: pulls low when the internal watchdog timer finishes its 1.6sec count and does not go high again until the watchdog is cleared. wdo also goes low during low-line conditions. whenever vcc is below the reset threshold, wdo stays low; how ever, unlike reset, wdo does not have minimum pulse width. as soon as vcc rises above the reset threshold, wdo goes high with no delay. reset o the inverse of reset, active high. whenever reset is high, reset is low.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 4 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits functional description the pt75xx family can assert reset output during power-up, power-down and brownout conditions for p system, detect power failure or low-battery conditions with a 1.25v threshold detect or and have watchdog functions. refer to function table of pt7a75xx family for their individual featur es. the typical application see figure 4. reset output the supervisory circuits can assert reset for a microprocessor during power-up, power-down and brownout to prevent code execution errors. on power-up, once vcc reaches about 1.2v, re set is a guaranteed logic low of 0.4v or less. as vcc rises, reset stays low. when vcc rises above the reset threshold, an internal timer re leases reset after about 200ms. reset pulses low whenever vcc drops below the reset threshold, i.e. brownout condition. if br ownout occurs in the middle of a previously initiated reset puls e, the pulse continues for at least another 140ms. on power-down, once vcc falls below the reset threshold, reset stays low and is guaranteed to be 0.4v or less until vcc drops below 1.0v. the pt7a752x and pt7a753x active-high reset output is simply the inverse of the reset output, and is guaranteed to be valid with vcc down to 1.2v. some ps, such as intel?s 80c51, requ ire an active-high reset pulse. watchdog timer the watchdog circuit monitors the p activity. if the p does not toggle the watchdog input (wdi) within 1.6sec and wdi is not in high impedance, wdo goes low. as long as reset is asserted or the wdi input is in high impedance, the watchdog timer will stay cleared and will not count. as soon as reset is released a nd wdi is driven high or low, the timer will start counting. pul ses as short as 50ns can be detected. typically, wdo will be connected to the non-maskable interrupt input (nmi) of a p. when v cc drops below the reset threshold, wdo will go low whether or not the watchdog timer has timed out yet. normally this would trigger an nmi interrupt, but reset goes low simultaneously, and thus overrides the nmi interrupt. if wdi is left unconnected, wdo can be used as a low-line output. since floating wdi disables the internal timer, wdo goes low only when v cc falls below the reset threshold, thus functioning as a low-line output. manual reset the manual-reset input (mr) allows reset to be triggered by a push button switch. the switch is effectively debounced by the 140ms minimum reset pulse width. mr is ttl/cmos logic compatible, so it can be driven by any logic reset output. power-fail comparator the power-fail comparator will send out a low signal once detects a voltage lowered than 1.25v. it can be used for various purposes because its output and non-inverting input are not inte rnally connected. the inverting input is internally connected t o a 1.25v reference.. typical application circuit dc linear regulator vcc supervisory pfi circuit wdi p vcc reset i/o line nmi interrupt in out reset wdo pfo mr p
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 5 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits maximum ratings storage temperature ............................................................-65 o c to +150 o c ambient temperature with power applied.......................... -40 o c to +85 o c supply voltage to ground potential (vcc to gnd) ............ ..-0.3v to +7.0v dc input voltage (all inputs exce pt vcc and gnd)......-0.3v to v cc +0.3v dc output current (all outputs) ..........................................................20ma power dissipation .......................................... 500mw (depend on package) recommended operation conditions sym description test conditions min typ max unit supply voltage for 75x1,75x2 - 4.5 5.0 5.5 v supply voltage for 75x3,75x4 - 3.0 3.3 5.5 v v cc supply voltage for 75x5 2.7 3.0 5.5 v cc > 4.0v 2.0 2.4 - v v ih1 mr input high voltage v cc 4.0v 0.7v cc - - v v ih2 wdi input high voltage - 0.7v cc - - v v cc > 4.0v - - 0.8 v v il1 mr input low voltage v cc 4.0v - - 0.2v cc v v il2 wdi input low voltage - - - 0.3v cc v t a operating temperature - -40 - 85 note: stresses greater than those listed under maximum ratings may cause perm anent damage to the device. this is a stress rating only and functional operation of the device at these or any other condi- tions above those indicated in the operational sec- tions of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 6 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits dc electrical characteristics (v cc = v rn + 5% to 5.5v, t a = -40~85oc, unless otherwise noted.)(note 1) symbol description test conditions min typ max unit i cc supply current 75x1/x2 vcc = 5v, 75x3/x4 vcc = 3.3v, 75x5 vcc = 3.0v, left wdi un- connected (no output load) - 30 200 a v ih input high voltage pin: mr, wdi 0.7v cc - - v v il input low voltage pin: mr, wdi - - 0.3v cc v t a = 25oc v rn - 1.5% v rn v rn + 1.5% 75x1 4.560 4.630 4.699 75x2 4.314 4.380 4.446 75x3 3.034 3.080 3.126 75x4 2.886 2.930 2.974 v rst reset threshold voltage ( note 2 ) 75x5 2.590 2.630 2.669 v v rth reset threshold voltage ( note 2 ) v cc varies between v rn - 5% - 70 - mv vcc 4.5v isource=800a vcc-1.5 - - vcc 2.7v isource=500a 0.8vcc - - v oh output high voltage vcc 1.8v isource=150a 0.8vcc - - v vcc 4.5v isink=3.2ma - - 0.4 vcc 2.7v isink=1.2ma - - 0.3 v ol output low voltage vcc 1.2v isink=100a - - 0.3 v v pfi varies from 1.0v to 1.5v 1.23 1.25 1.27 v pft pfi input threshold v pfi varies from 0v to 1.0v 1.20 1.25 1.30 v pfi connected to vcc - - 2.00 i pfi pfi input current pfi connected to gnd -2.00 - - a wdi connected to v cc - 30 100 i wdi average wdi input current ( note 3 ) wdi connected to gnd -100 -30 - a i mr mr input current mr=0, vcc = 5v -600 -250 -100 a note: 1. parameters of room temperature guaranteed by production test and parameters of full-temperature guaranteed by design. 2. valid for both reset and reset. v rst is the reset threshold voltage when v cc from high to low level, v rn is nominal reset threshold voltage. 3. wdi is internally serviced within the watchdog period if wdi is left unconnected.
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 7 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits ac electrical characteristics symbol description test co nditions min typ max unit t rs reset pulse width mr from low to high, t a =25 160 200 280 ms t wd watchdog timeout period wdi, mr tied to vcc, vcc>v rn +5% , t a =25 1.2 1.6 2.25 s t mr mr pulse width - 200 - - ns t md mr to reset delay vcc=5v - - 250 ns t wp wdi pulse width - 150 - - ns watchdog timing diagram t wp t wd t wd t wd t rs wdi wdo reset reset 5v 0v 5v 0v 5v 0v 5v 0v externally triggered by mr watchdog timing diagram v rt t rs t rs t mr t md wdo reset mr 5v 0v v rt v cc 5v 0v 5v 0v 5v 0v
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 8 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits mechanical information we (lead free and green soic-8) pe (lead free dip-8) x. xx x. xx denotes dimensions in millimeters n ote: 1) controlling dimensions in inches. 2) ref: jedec ms-001 ba 1 8 .355 .400 9.01 10.16 .240 .280 6.09 7.11 7.62 8.25 .300 .325 .008 .014 0.20 0.35 .430 max 0 o 15 o 10.92 2.54 5.33 .210 max seating plane .014 .022 .115 .150 .356 .558 2.921 3.81 .100 typical .015 min 0.381 x.xx x.xx denotes dimensions in millimeters n ote: 1) controlling dimens ions in millimeters . 2) ref: jedec ms-012 aa seating plane 1 8 .189 .196 4.80 5.00 .149 .157 3.78 3.99 .016 .026 0.406 0.660 ref .050 bs c 1.27 .013 .020 0.330 0.508 .0040 .0098 0.10 0.25 .053 .068 1.35 1.75 .0099 .0196 0.25 0.50 x 45 o 0-8 o .016 .050 0.40 1.27 .0075 .0098 0.19 0.25 .2284 .2440 5.80 6.20
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| pt0082(10/10) ver: 7 9 data sheet pt7a7511-15/7521-25/7531-35 p supervisor circuits notes email: support@pti.com.cn web si te: www.pti.com.cn, www.pti-ic.com china : no. 20 building, 3/f, 481 guiping road, shanghai, 200233, china tel: (86)-21-6485 0576 fax: (86)-21-6485 2181 asia pacific : unit 1517, 15/f, chevalier commercial centre, 8 wang hoi rd, kowloon bay, hongkong tel: (852)-2243 3660 fax: (852)- 2243 3667 u.s.a. : 3545 north first street, san jose, california 95134, usa tel: (1)-408-435 0800 fax: (1)-408-435 1100 pericom technology incorporation reserves the right to make cha nges to its products or specifica tions at any time, without noti ce, in order to improve design or performance and to supply the best possible product. pericom t echnology does not assume any responsibility for use of any circu itry described other than the circuitry embodied in pericom technology product. the company make s no representations that circuitry described herein is free from patent infringement or other rights, of pericom technology incorporation.
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